Field
This disclosure relates generally to Networks on Chip methods and systems, and more specifically, to switch points used within NoCs.
Related Art
Networks on Chip (NoC) are challenged with higher performance and communication at increasing bandwidths. In an NoC a packet traverses from a source device to a destination device. The source device and destination device may be directly connected to each other. More likely, the source device and destination devices may be connected through intervening devices. Packets traversing from source devices to destination devices are subject to undesirable latencies. These latencies accumulate as packets traverse each device in the path from source to destination, which limit the performance and adversely affect the overall communication bandwidth of the NoC.
In order to improve performance and bandwidth of the NoC, the latencies associated with traversal of packets from source devices to destination devices need to be addressed.